Search:

Didn't get a working environment yet,
But to compile the module do the following

Install the ASUS GPL 1927 tar gz
Go to the src/linux/linux/drivers/parport directory
copy parport_fs.c into it...

All,

Readed the source code again, i putted some very specific code which i needed, you might want to modify
xgpio_init() and xgpio_write()

I used it to control a stepper.

I don't know if...

* parport_fs.c, module to give access to a memory region like the gpio device
* Author : Florian Schneider, very hacked up version
* Example, No support, worked on the 1.7.5 oleg release
* Put...

Created a module which gives me access to a memory location.
It is still very basic but i can now access the data register of the parallel port
and turn the connected LED on and off with a kind of...

But thats no fun, i just want to have a generic 8x8 bit remote WiFi interface :)

Tested@
Model: WL-500g v2.4
Firmware: 1.7.5.9-5 (Oleg)

Device NOT WORKING
Brandname: Philips
Brandtype: Philips ToUCam XS PCVC720K/20
USB Interface: USB 1.1 compliant
URL To manufacturer:...

I'm running the 1.7.5.9-5 (Oleg) release
What i want to do is to hookup some steppermotors to the Wl500G to remotely control/position a webcam.

All,

From other messages i understand that when you connect a UART to the Serial port Header it will be used by PMON and LINUX.
But i expect that UART1 is not used. So it must be possible to...

Tested@
Model: WL-500g
Firmware: 1.7.5.6-5 (Oleg)

Device WORKING
Brandname: SITECOM
Brandtype: CN-032
USB Interface: USB 2.0 compliant
URL To manufacturer: http://www.sitecom.nl/
URL To...

Hmm, so possible to add 2 UART's, can i expect the following layout ?

UART0 0xBF800000 Base of 'COM1'
UART1 0xBF800008 Base of 'COM2' ?

IO Memory locations from base
+0x00 THR (Transmit...

Model: WL-500g
Firmware: 1.7.5.9-5 (Oleg)
Hardware: 2.4

Device OK:
Brandname: Sweex
Brandtype: Compact Flash cardreader (CR-V7-UC)
Memory: SanDisk 16MB CF (ext2, boot_dev=)
USB Interface:...

Tested: Working
Model: WL-500g
Firmware: 1.7.5.9-5 (Oleg)

Device: HD260
Brandname: MyCom
Brandtype: 2,5" Hard Disk Casing
USB Interface: USB 2.0 High Speed (480Mbit) compliant
URL To...

A little (print of) ASCII art of the Header. But how is it mapped to the memory. From the parport_splink.c (openwrt code) i saw that the par port is mapped to

Parport Data 0xBF800010...

Hi,

I'm looking for the pin layout of the internal connector for the serial port and where it is mapped to the CPU. I'm not used to the mips proc arch, but understand mem mapped io, which it seems...