Serial header info

[Zolf]

Hi,

I'm looking for the pin layout of the internal connector for the serial port and where it is mapped to the CPU. I'm not used to the mips proc arch, but understand mem mapped io, which it seems to use.

Thanks
Zolf

[Antiloop]

i would suggest you to first refer to this topic:
587

there is a blockdiagram scheme available, will be published on request not free for download..

[Antiloop]

quoted from a pm:


Hi Antiloop,
FYI the COM Port connector contains the same signals as CON1 connector in WRT-54g (no big surprise...). Maybe you know this site: http://cier.de/wrt54g/
Now I am looking for the socket plug - I am afraid it will be hard in our country...
In my opinion the signal assignment should be following:
signal ......... COM Port pin ............. 16C552D pin
/CS ............. 14 .................. 18
/RD ............. 15 .................. 24
/WR ............ 16 .................. 20
INT ............. 17 .................. 34

GND ............ 18 ................... 12,22
+5V ............ 13 ................... 33,44

D0-D7 ......... 1-8 ................... 2-9
A0-A3 .......... 9-12 .................... 10,14,15,-

Best regards,
Technik.

[Zolf]

quoted from a pm:

A little (print of) ASCII art of the Header. But how is it mapped to the memory. From the parport_splink.c (openwrt code) i saw that the par port is mapped to

Parport Data 0xBF800010
Parport Status 0xBF800011
Parport Control 0xBF800012

But where is teh COM/UART port mapped ?

===========================================
UART Header on Asus WL500G V2.4 Systemboard

+---------+
D0 |* 1 2 *| D1
D2 |* 3 4 *| D3
D4 |* 5 6 *| D5
D6 |* 7 8 *| D7
A0 |* 9 10 *| A1
A2 |* 11 12 *| A3
+V5 |* 13 14 *| /CS (Chip Select)
/RD (Read Data) |* 15 16 *| /WR (WRite enable)
INT |* 17 18 *| GND
NC |* 19 20 *| NC
+---------+

remark : To access the header you need to open
the WL500G whicH void's warranty

[Oleg]

UARTs are at 0xBF80000x

[Zolf]

UARTs are at 0xBF80000x

Hmm, so possible to add 2 UART's, can i expect the following layout ?

UART0 0xBF800000 Base of 'COM1'
UART1 0xBF800008 Base of 'COM2' ?

IO Memory locations from base
+0x00 THR (Transmit Holding Reg.) /RBR (Receive Buffer Reg.) /DLL (Div. Latch LSB)
+0x01 DLH (Div. Latch MSB)/IER (Int. Enable Reg)
+0x02 FCR (FIFO Control Reg.) /IIR (Int. Ident. Reg.)
+0x03 LCR (Line Control)
+0x04 MCR (Modem Control)
+0x05 LSR (Line Status)
+0x06 MSR (Modem Status)
+0x07 SCR (Scratch)
(found info on http://www.agamemnon.net/documents/handbook/hw-io.html)

[Technik]

Hmm, so possible to add 2 UART's, can i expect the following layout ?

UART0 0xBF800000 Base of 'COM1'
UART1 0xBF800008 Base of 'COM2' ?

Yes. :)

[Zolf]

All,

From other messages i understand that when you connect a UART to the Serial port Header it will be used by PMON and LINUX.
But i expect that UART1 is not used. So it must be possible to connect some thing else to this address range to have 8 general 8 bit io ports.
But now how can i access them from a 'normal' executable.
Watchdog.c is playing with /dev/gpio. Is there another device which gives me 'generic' access to the memory mapped io locations ?

[Zolf]

All,

From other messages i understand that when you connect a UART to the Serial port Header it will be used by PMON and LINUX.
But i expect that UART1 is not used. So it must be possible to connect some thing else to this address range to have 8 general 8 bit io ports.
But now how can i access them from a 'normal' executable.
Watchdog.c is playing with /dev/gpio. Is there another device which gives me 'generic' access to the memory mapped io locations ?

I'm running the 1.7.5.9-5 (Oleg) release
What i want to do is to hookup some steppermotors to the Wl500G to remotely control/position a webcam.

[WlanMan]

Hehe

I thougt about something similar.
It sounds possible to use the uper 8 adresses if you remove the serial drivers from the kernel, but you have to add some sort of custom module then. Im not sure if you can go from user space to hardware adresses with root rights like it´s possible on x86.

For Stepper controll, if you have enough money go and buy a logitech quickcam sphere / orbit. this ones are supported by the phillips webcam driver and have inbuild lens motors for pan,tilt,and digital zoom. you only need software like palantir to controll them.

Greets

[Zolf]

Hehe

I thougt about something similar.
It sounds possible to use the uper 8 adresses if you remove the serial drivers from the kernel, but you have to add some sort of custom module then. Im not sure if you can go from user space to hardware adresses with root rights like it´s possible on x86.

For Stepper controll, if you have enough money go and buy a logitech quickcam sphere / orbit. this ones are supported by the phillips webcam driver and have inbuild lens motors for pan,tilt,and digital zoom. you only need software like palantir to controll them.

Greets

But thats no fun, i just want to have a generic 8x8 bit remote WiFi interface :)

[Zolf]

Created a module which gives me access to a memory location.
It is still very basic but i can now access the data register of the parallel port
and turn the connected LED on and off with a kind of /dev/gpio interface.
I used the gpio.c 'example' of the /linux/arch/mips/brcm* directory and some code from parport_splink.c.

[KillerOPS]

could you post the sourcecode and the module here? And a little example on how to use it?
I think it's exactly the thing i need

Thank you in advance

[KillerOPS]

check this out for the parallel port of asus wl-500g http://www.sephail.net/projects/openwrt/