Bekijk de volledige versie : Make an expansion board with a serial port(s) for WL-500b/g
Yes it is possible - I have made and tested this RS232 interface yet (see the bootup messages from PMON below). :)
Please note you will loose the warranty by this modification as there is a warranty label that you will have to remove.
There's no impact to the router's mainboard as the expansion card is connected through onboard connector only and it can be removed anytime.
You will need just few electronic parts to make the expansion board.
- UART or DUART chip (16c552,16c550,16c450,82c50,...)
- XTAL 13 MHz (or close to 13 MHz)
- MAX232 or equivalent (two pieces if you plan to use DUART)
- some passive elements - capacitors, resistors, connectors
The schematic will follow later on (as soon as I convert it to electronic form somehow...) :)
Messages from PMON during the boot:
PMON version 5.3.22 [EL], LSI LOGIC Corp. and Broadcom Corp.
Compiled on Fri Apr 25 15:24:08 2003
CPU type 4710.CPU clock frequency 125 MHz.Avail RAM 16384 KBytes.
NVRAM: AMD 29lv320DT 2Mx16 TopB.
Visit www.carmel.com for updates.
~Downloading os image in 3 seconds
Using specified MAC address.
et0: Broadcom BCM47xx 10/100 Mbps Ethernet Controller 3.11.19.0
MAC Address: xx:xx:xx:xx:xx:xx
Opened ethernet
Downloading from ethernet, ^C to abort
Downloading image time out
Boot os from the flash
CRC OK
Uncompressing..................................... ................done
Doing command call 80001000
Antiloop
07-07-2004, 17:07
technik NICE work! :) can you supply us with some nice pics for reference till you finish the schematics?
technik NICE work! :) can you supply us with some nice pics for reference till you finish the schematics?
OK then... :) But it's a bit brutal so don't be disgusted with this please! :D
BTW I would like to say THANK YOU to hwsoft for providing me with the UART chips and to Antiloop as well for the information about ASUS hardware. :) Thanks guys!
Antiloop
07-07-2004, 21:55
nice nice :)
thank you 2 ;)
so i can just use those old uart chips from old ISA cards or similair, nice upcoming project sometime..
Yes you can use an old chips if they can operate at 13 MHz clock rate. That's why I put the UART to socket - sometimes it's not easy to find a datasheet of some specific chip... 16c55x recommended because of FIFO buffer.
It should be also possible to use XTAL with lower frequency and change the serial port initialization to get the same baud rate.
BTW this is a list of PMON commands:
...
Opened ethernet
Downloading from ethernet, ^C to abort
break!
~PMON> h
h The help command m modify memory
copy copy memory d display memory
fill fill memory search search memory
compare compare memory uncmp Uncompress gzip file
set display/set variable unset remove variable
hi display command history vers display version info
load load memory from hostport call call function
cp2fl Copy Ram to Flash nvInit no options
nvErase no options etdiag enet diag. test
ildiag iline diag. test rmdiag sdram diag. test
mpdiag mass production diag. test pcidiag pci interface diag. test
pmadiag pcmcia interface diag. test leddiag led gpio interface diag. test
usbdiag usb interface diag. test plpdiag parallel port interface diag. test
PMON>
The help function is working also for every listed command. :)
OK then... :) But it's a bit brutal so don't be disgusted with this please! :D
BTW I would like to say THANK YOU to hwsoft for providing me with the UART chips and to Antiloop as well for the information about ASUS hardware. :) Thanks guys!
Seems you have 2.x firmware, which uses different header for connecting UART. 1.x has something proprietary. :(
Seems you have 2.x firmware, which uses different header for connecting UART. 1.x has something proprietary. :(
Yes, Oleg - the router HW revision is 2.40. Revision 1.00 uses a different connector which is quite hard to obtain (see photos here: http://wl500g.info/showthread.php?t=8).
Antiloop
08-07-2004, 13:07
which are the first 2 letters/numbers of your serial Technik/Oleg ?
eg it will start with a 3 of 4
i want to know since when the v2 hardware is sold
my youngest unit is from december 2003 also produced in dec-2003
2.x units has MACs starting with 00:0e: as seems, while 1.x has 00:0c:.
Mine is 1.4 and was bought in Germany in nov-dec 2003, do not know exactly.
Antiloop
08-07-2004, 13:55
yes that's right.. i believe my december unit is starting with 00:0e too
but what i meant was the serial number.. that's at the bottom of the router
which are the first 2 letters/numbers of your serial Technik/Oleg ?
eg it will start with a 3 of 4
i want to know since when the v2 hardware is sold
my youngest unit is from december 2003 also produced in dec-2003
Mine starts with:
42, MAC 00:0e... HW rev. 2.40 (WL-500g)
3A, MAC 00:0c... HW rev. 1.00 (WL-500b)
Just FYI... :)
PMON version 5.3.22 [EL], LSI LOGIC Corp. and Broadcom Corp.
Compiled on Fri Apr 25 15:24:08 2003
CPU type 4710.CPU clock frequency 125 MHz.Avail RAM 16384 KBytes.
NVRAM: AMD 29lv320DT 2Mx16 TopB.
Visit www.carmel.com for updates.
~Hello!! Enter Rescue Mode:
Using specified MAC address.
et0: Broadcom BCM47xx 10/100 Mbps Ethernet Controller 3.11.19.0
MAC Address: xx:xx:xx:xx:xx:xx
Opened ethernet
Downloading from ethernet, ^C to abort
Wait for Rescue Client IP BroadCasting ...
break!
~Downloading os image in 3 seconds
Using specified MAC address.
et0: Broadcom BCM47xx 10/100 Mbps Ethernet Controller 3.11.19.0
MAC Address: xx:xx:xx:xx:xx:xx
Opened ethernet
Downloading from ethernet, ^C to abort
Downloading image time out
Boot os from the flash
CRC OK
Uncompressing..................................... ................done
Doing command call 80001000
Antiloop
08-07-2004, 16:34
eh..
Visit www.carmel.com for updates.
what the heck does that has to mean?
geez.. they're fucking around with us :D
eh..
what the heck does that has to mean?
geez.. they're fucking around with us :D
:) Didn't you try to use search function? ;) But it couldn't help to get the source codes anyway...
Oleg, are you very busy these days? :) Couldn't you please make the customized version with original serial driver implanted? ;)
Please ignore that request if you have more important tasks... ;) But it would be really nice to play with analog modem, mobile phone, console over serial etc... :)
Antiloop: pmon sources are available in wap54g sources (except ASUS modifications).
Technik: Be patient. :) The cheaper solution for the modem is the USB modem or USB/COM converter. Also, firmware by default will use first COM port for console, so you need at least another one or recompile the kernel with init string of your choice.
Mine AP serial starts with 38.
Antiloop
08-07-2004, 23:35
okay.. if your MAC address is beginning with 00:0E this will NOT mean this is revision 2.40
one of my wl500g's has 00:0e as beginning of the MAC address but is revision 1.40 this one has 3C as starting of the serial
can someone check with serial beginning with 41 if he has got a revision 2.40 ?
I have an old ISA multiport board, I'll check if I can extract the UART :D
If I can't, I can use a TL16C550CN (datasheet (http://rocky.digikey.com/WebLib/Texas%20Instruments/Web%20data/TL16C550C,%20TL16C550CI.pdf)) available from digikey, right?
I have an old ISA multiport board, I'll check if I can extract the UART :D
If I can't, I can use a TL16C550CN (datasheet (http://rocky.digikey.com/WebLib/Texas%20Instruments/Web%20data/TL16C550C,%20TL16C550CI.pdf)) available from digikey, right?
Use a hot-air gun for a chip extraction if you have any. :)
You can definitely use the mentioned chip as well.
Hi Technik
Can you make a clearer drawing of the Pinheader ?
8051 Bus IO Chips are widely avaliable and can controll several things if they can be hooked up to the router :rolleyes:.
Hi Technik
Can you make a clearer drawing of the Pinheader ?
8051 Bus IO Chips are widely avaliable and can controll several things if they can be hooked up to the router :rolleyes:.
OK, I am going to make a better schematic image finally. Unfortunately I have detected a problem with Linux console - bidirectional communication is not reliable - characters are garbled so it's almost unusable. I am analyzing what's the problem because in PMON everything works fine. As I am using 16c450 chip without buffer, maybe that's the main reason....
OK, I am going to make a better schematic image finally. Unfortunately I have detected a problem with Linux console - bidirectional communication is not reliable - characters are garbled so it's almost unusable. I am analyzing what's the problem because in PMON everything works fine. As I am using 16c450 chip without buffer, maybe that's the main reason....
Can you use/set parity for your connection? That should eliminate the garbled characters...
Josephus
02-02-2005, 18:35
Is this supposed to work with wl500gx too?
I don't know much about these things, but why do we need that winbond IC? What's it doing? I saw serveral howtos for wrt54g, which only requires rs232 ic.
wl500gx should work in the same way as wrt54g, it does not need an external uart.
Aynone has a better schematics?
There are some things that I don't understand on this one... :(
Aynone has a better schematics?
There are some things that I don't understand on this one... :(
OK, check the updated post here: http://wl500g.info/showpost.php?p=3312&postcount=3
The bottom file should be a bit better. :)
Hi
I wonder how the Serial port is done on this Microsoft Box with Broadcom Chip. 4702 is the same as in wl500, but the board has only a 12pin connector labelt with rs232 which is not enough for a 8bit Bus interface...
Greets
Hi
I wonder how the Serial port is done on this Microsoft Box with Broadcom Chip. 4702 is the same as in wl500, but the board has only a 12pin connector labelt with rs232 which is not enough for a 8bit Bus interface...
Greets
Do you mean MN700 box mentioned in another thread? The 12 pin connector is JTAG and 10 pin connector labeled UART - that's the correct one. It is probably set of UART pins at TTL/CMOS levels. So any MAX232 compatible chip should be used to convert these levels to RS232. You need to explore the board to identify the connector pins assignment (or get a board schematics somewhere).
OK, check the updated post here: http://wl500g.info/showpost.php?p=3312&postcount=3
The bottom file should be a bit better. :)
that's a lot better, thanx!
Now, question: I have an old board, from an XT i think.
the UART is a SiS 82C450 and near it it's a 18.432MHz XTAL. Do you think it will work as it should, with a 13 MHz XTAL?
Thanx!
that's a lot better, thanx!
Now, question: I have an old board, from an XT i think.
the UART is a SiS 82C450 and near it it's a 18.432MHz XTAL. Do you think it will work as it should, with a 13 MHz XTAL?
Thanx!
I am afraid you HAVE TO use a 13 MHz XTAL (in ideal case it should be 12.75 MHz +/- 5%).
yes, the xtal will be 12.75 mhz, no problem, but i think the uart is intended to work with a 18 mhz xtal. my question should be:
- if i have an uart that's intented to work with an 18 mhz xtal, will it work in this case if i use it with a 13 mhz xtal?
yes, the xtal will be 12.75 mhz, no problem, but i think the uart is intended to work with a 18 mhz xtal. my question should be:
- if i have an uart that's intented to work with an 18 mhz xtal, will it work in this case if i use it with a 13 mhz xtal?
Find and check the data sheet for your specific chip then...
The top frequency limit is important. I am sure the UART chip will work fine at any lower frequency.
i've searched for datasheet but I couldn't find it.
oh well... i'll try and see what it gets.
I presume that 1M means 1 uF capacitor, right?
I would just need 2 pins of the serial port to control a 240V relais.
Is this possible?
Read more and post here.
http://wl500g.info/showthread.php?p=11849#post11849
Josephus
09-03-2005, 13:04
wl500gx should work in the same way as wrt54g, it does not need an external uart.
Which uart pinout does the bootloader use? TX0/RX0 or TX1/RX1
It's still a gx, but i can't measure voltage change, it's a constant 3.3v. If there was something data, its effective voltage should be less than that.
Unfortunately, i don't have a scope...
Does serial console enabled in your latest firmware?
Which uart pinout does the bootloader use? TX0/RX0 or TX1/RX1
It's still a gx, but i can't measure voltage change, it's a constant 3.3v. If there was something data, its effective voltage should be less than that.
Unfortunately, i don't have a scope...
Does serial console enabled in your latest firmware?
Should be TX0/RX0. Yes, console is enabled.
For my understanding: is the UART now memory mapped? Or is it somewhere in PCI space?
For my understanding: is the UART now memory mapped? Or is it somewhere in PCI space?
Available in memory at base address 0xBF800000.
How many people have actually installed an UART on their wl-500g? Are they working flawlessly? I'm thinking about adding one, but it would be nice to hear a few experiences first. (Yes I know it is easier to add a serial port with a pl2303, I have already done this but want to try something new...)
Technik: How did you know that a 12.75 MHz is the right rate? (Where in the source did you find it?)
I would like to use a PC16552D (dual UART); can the two UARTs share the interrupt? (INTR1 and INTR2 outputs OR'ed together and then connected to PIN17)
Some guy in the Dutch forum already has a serial port hooked up: http://wl500g.info/showthread.php?t=3587
Perhaps you can contact him...
...
Technik: How did you know that a 12.75 MHz is the right rate? (Where in the source did you find it?)
I would like to use a PC16552D (dual UART); can the two UARTs share the interrupt? (INTR1 and INTR2 outputs OR'ed together and then connected to PIN17)
Sorry for the late response... :rolleyes:
The original source was in some discussion about WRT54G. I expected that the same frequency could work in WL-500 as well --> true. If you use different XTAL, you will probably have to patch the serial driver - AFAIK there are Baud Rate Divisor constants.
Interrupt sharing should be OK. Please read this thread as well:
http://wl500g.info/showthread.php?t=1993
Sorry for the late response... :rolleyes:
Appreciated nevertheless. :)
I suppose the kernel finds and initializes the serial ports in sbmips.c, funktion sb_serial_init, is this right? The wl500g has a "extif core" (don't know what this is all about, but as the signals are named EIF_OE, EIF_WE, et cetera, I assume this is EXTIF related), so add(regs, irq, 13500000, 0) is called. The third variable is called baud_base. Hm... 13,5MHz? Was the 12,75MHz XTAL just close enough to this value to make it work, or are the 12,75MHz defined somewhere else?
By the way - I would find further information about the inner workings of the bcm47xx series really usefully, especially I don't really understand what these "cores" are and what "core switching" is about. I allready did a fair bit of reading the kernel sources but if there is some kind of tutorial available for this platform (without signing any kind of NDA...), this would really help me.
By the way - I would find further information about the inner workings of the bcm47xx series really usefully, especially I don't really understand what these "cores" are and what "core switching" is about. I allready did a fair bit of reading the kernel sources but if there is some kind of tutorial available for this platform (without signing any kind of NDA...), this would really help me.
This is a concept of silicon backplane bus, which should be covered for the SiByte sb1250 cpu. Try this link http://www.broadcom.com/products/Enterprise-Small-Office/Communications-Processors
Thanks for the link Oleg; I have taken a look at the BCM1125H/BCM1250 User Manual; It is quit a nice read and although I'm not sure how much of this applies to my wl500g, Chapter 11 - "Generic/Boot bus" was very interesting and helped me in understanding the bus which the external uart(s) and parport is connected to.
Well, it has nothing is common with wl500g, except silicon bus backplane (chip internal bus) concept. ;)
Ah, ok, this pretty much confirms my "guesstimation". :D
Another question concerning the extif: I have read sbextif.h and sbmips.c, where the timing/delay parameters are initialized:
/* Set programmable interface timing for external uart */
tmp = CEIL(10, ns) << FW_W3_SHIFT; /* W3 = 10nS */
tmp = tmp | (CEIL(20, ns) << FW_W2_SHIFT); /* W2 = 20nS */
tmp = tmp | (CEIL(100, ns) << FW_W1_SHIFT); /* W1 = 100nS */
tmp = tmp | CEIL(120, ns); /* W0 = 120nS */
W_REG(&eir->prog_waitcount, tmp); /* 0x01020a0c for a 100Mhz clock */
Does anyone (Oleg? ;)) know which timing parameters W0 to W3 are? This seems to be quite different from the BCM1250 (there are far more parameters described in the BCM1250 manual).
The reason I'm asking this is that I want to add not only the (D)UART but maybe also other devices (i2c using a pcf8584 would be nice, some additional GPIO ports using 74ls273, etc...). To do this it is necessary to implement a simple address decoding circuit; the current one is quit inefficient - the lpt port is selected every time A4 is asserted, so it's not only available at 0xbf800010 but at 0xbf800018 as well because A3 is not checked. So if this is properly done the address range from 0xbf800018 to 0xbf80001f would be available for other purposes. The same is true for the range from 0xbf800400 to 0xbf80040f (if the chip select for the UART is only generated when A10 is low) and 0xbf800418 to 0xbf80041f. I have listed only these ranges because A10 and A4 to A0 are all easily accessible from pcb pads or pins and this method would give us 8+16+8=32 memory locations which should be enough for most applications.
I have attached a image, just in case my english wasn't intelligible. ;)
BTW: Technik, have you any opinion whether it really is a 12,75MHz XTAL or rather 13,5MHz? (See post #41)
...
BTW: Technik, have you any opinion whether it really is a 12,75MHz XTAL or rather 13,5MHz? (See post #41)
Try 13,0MHz XTAL then...:) In fact I am using 12,288 MHz and it works fine as well. Please note 5% difference is perfectly OK in any case.
I've built the UART board, using a new PC16550DV (accidentely ordered it - I actually wanted a PC16552DV), 13,56MHz Crytal.
I haven't implemented my plans for this address decoding circuit yet, so simply connected /CS2 = /EIF_CS and CS0 = CS1 = Vcc (with CS0 = A3 PMON wouldn't print any startup message - apparently it only uses the UART at 0xbf800000) therefore the kernel recognizes one UART at 0xbf800000 and a second one at 0xbf800008. PMON access is working, but shell access via the serial console is somehow messed up - if I transmit certain characters (eg. 'o' '~' or 'ö') the shell acts as if I have pressed this character or <LF> a few times... :confused:
As the whole circuit isn't really shielded and the TX and RX wires are at the moment just loosely connected to my serial port, I first blamed these events on EM-interference or cosmic rays :D, but when I transmitted the same characters while using pmon, they just appeared/worked as they should.
I'm using minicom; 115200 bps, 8n1, no flow-control (and this should be the right settings...).
Any ideas why this is happening?
@Technik: In post #21 you wrote about similar problems, did you solve them?
I've built the UART board, using a new PC16550DV (accidentely ordered it - I actually wanted a PC16552DV), 13,56MHz Crytal.
I haven't implemented my plans for this address decoding circuit yet, so simply connected /CS2 = /EIF_CS and CS0 = CS1 = Vcc (with CS0 = A3 PMON wouldn't print any startup message - apparently it only uses the UART at 0xbf800000) therefore the kernel recognizes one UART at 0xbf800000 and a second one at 0xbf800008. PMON access is working, but shell access via the serial console is somehow messed up - if I transmit certain characters (eg. 'o' '~' or 'ö') the shell acts as if I have pressed this character or <LF> a few times...
UART here programmed by PMON to work with oscillator 7 times faster than in PC, so ideal crystal must be 115200x16x7 = 12.9024MHz, but +/-5% also would be Ok.
13.56MHz gives you baudrate 121071 (instead of 115200), which exceed 5% margins and it's a cause of this seldom errors...
So just change your crystal to 13MHz... :)
Thanks the answer. :)
Hm... will try this; I also have a 12,75MHz ready. But I still don't understand why this error _never_ appears in PMON, but can be reproduced reliably after startup, when using the shell...
But I still don't understand why this error _never_ appears in PMON, but can be reproduced reliably after startup, when using the shell...
As far as I understand you, your comp always receive bytes from WL without errors ('cause PMON only send data, don't receive it), but WL sometimes "misunderstand" bytes from comp (when you try to work with shell) ?
If so, maybe it depends on schematic of UART chip in your comp (how much times and at which phase it samples each received bit; - there was many different chips, and some of them doesn't perform proper majoritation on tree samples per bit).
In any case, 13.56MHz - is not a right frequency. ;)
As far as I understand you, your comp always receive bytes from WL without errors ('cause PMON only send data, don't receive it), but WL sometimes "misunderstand" bytes from comp (when you try to work with shell) ?
Not completely correct. I have communicated with PMON (if you cancel the boot with Ctrl+C) succesfully und this works - I can issue commands, etc.
With PMON if I send an 'o' it receives (and echoes back) an 'o'. This doesn't work on the console (after bootup). Sometimes it echoes a few 'o', or it acts as if I had transmitted a line-feed.
In the meantime I have conducted tests with my 12,75MHz Crytal. The results are the same...
By the way from where do you know that PMON expects a frequency of 7x the standard (1.8432MHz)?
I still have the opinion that 13,5MHz is the value that the linux kernel expects for serial port initialization (-> sbmips.c).
Not completely correct. I have communicated with PMON (if you cancel the boot with Ctrl+C) succesfully und this works - I can issue commands, etc.
With PMON if I send an 'o' it receives (and echoes back) an 'o'. This doesn't work on the console (after bootup). Sometimes it echoes a few 'o', or it acts as if I had transmitted a line-feed.
In the meantime I have conducted tests with my 12,75MHz Crytal. The results are the same...
Sorry, then I have no ideas. :(
You can try to send some characters with chess-board patterns in upper nibble (for example 0x55 - 'U' or 0xAA - 'ê') and check how they will be echoed back...
By the way from where do you know that PMON expects a frequency of 7x the standard (1.8432MHz)?
I still have the opinion that 13,5MHz is the value that the linux kernel expects for serial port initialization (-> sbmips.c).
Frequency from XTAL1 pin in all UART chips (if they are 8250 compatible, of course) divided by 16-bit value of DLL/DLH register pair (and you can see this frequency at BAUDOUT' pin of your UART by scope) then divided by 16; - thus we get needed baudrate.
So, to get 115200 baud with 13.5MHz crystal we must load DLL/DLH with value of 7,32421875... But this registers are integer ;), so we can only load either 7 or 8. - In first case we will have 120536 baud, in second - 105469. Not 115200...
Btw, my port-extender to WL500G works fine with "canonical" 1.843MHz (look at generator on second photo) - it's only needed to set PC terminal to 16457 baud. Some terminal programs doesn't know how to do this, but mine - know. :)
Another way to get 115200 baud with 1.843 quartz - setserial /dev/tts/0 baud_base 115200 divisor 1 spd_cust (but this will work only untill reboot, of course).
@Technik: In post #21 you wrote about similar problems, did you solve them?
No - it seems that Kernel is not able to receive bytes from UART correctly (input - it looks like MSB is corrupted - sometimes - and incorrectly recognized as logical H). Output seems to be OK in any case. In PMON everything works fine in both directions. I did not analyze this problem deeply yet nor tried to change any serial port parameters.
Update: I have just tried Bray's Terminal 1.9b (http://bray.velenje.cx/avr/terminal/) instead of Hyperterminal and set parameters to 115200, 8, space, 1, XON/XOFF. No more corrupted characters...
I have already tried enabling software flow-control and the different parity settings, but I've never tried _both_...
I will try this as soon as possible.
I have already tried enabling software flow-control and the different parity settings, but I've never tried _both_...
I will try this as soon as possible.
I have tried the same in Hyperterminal - no luck. I don't say Hyperterminal is bad but... :rolleyes: Strange anyway. Perhaps changing default ttys0 parameters could be the right way.
Hm... I was using minicom for my tests, but I don't have time at the moment to test this with parity and sw-flowcontrol.
Update: I have just tried Bray's Terminal 1.9b (http://bray.velenje.cx/avr/terminal/) instead of Hyperterminal and set parameters to 115200, 8, space, 1, XON/XOFF. No more corrupted characters...
Doesn't work for me.
Setting the UART type with
setserial /dev/tts/0 uart 16550
(it was set to a 16550A - which is AFAIK correct for a PC16550DV) and killing the currently running shell for tts/0, solved my problems, but I really don't understand why...
Can I have one of your's trx files? :o
Can I have one of your's trx files? :o
Ehm... I don't have any firmware with embedded setserial - the setserial program was copied to the router using scp.
mangodan
02-03-2006, 18:40
Hallo there,
I've built a dinky little thing, with a BFP48 packaged TL16C550CPTG4
datasheet http://www.farnell.com/datasheets/61904.pdf
It sends chars fine, as the WL500g responds to commands I type, the echoed chars are however corrupted. I'm putting this down to the fact i'm running it from the 13.5MHz source i tapped from the parallel port Interfaces XTAL and the receiving end is not as tolerant as the the WL500G.
I cant for the life of me find a 13MHz XTAL at a reasonable price and want to use a standard readily available device.
This raises the question, can I alter the baud factor used by the IC from 7 to 4 and use a 7.3728MHz Device? I read that the value is set by the boot loader. Are the sources available for this so that i can rebuild and reflash it (JTAG??) or can i do this from the kernel files mentioned ? (would seem likely to me).
Any comments?
Thanks
Dan
mangodan
02-03-2006, 19:30
Hmm!
I rebuilt my firmware and flashed with the console=/dev/tts/0 omitted and confirmed it updated by checking dmesg
zone(0): 4096 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/mtdblock2 noinitrd init=/linuxrc
CPU: BCM4710 rev 0 at 125 MHz
Calibrating delay loop... 82.94 BogoMIPS
Yet there is still a console running on the serial port, well i can still execute commands from the serial port! How do i omit this? Normally i would look in /etc/inittab, but his is nonexistant. I want to talk to PIC with my serial port which in turn will talk to a lcd display and a some controls for volume level etc.
Using the first serial port for peripheral devices isn't so simple.
The bootloader uses it for the boot-messages, the kernel uses it for its messages and there is also a program running, which provides shell access.
You have only disabled the kernel output.
mangodan
02-03-2006, 20:44
Hi, my laptop is less fussy about baud rate and reveals i do indeed have a fully functioning shell on tts/0. I have found what appears to be where the shell is set up in init.c, im going to try fiddling with this to see if i can shift the shell elsewhere.
What baud does PMON speak at? I've played with various baud rates and cannot get any output, the first thing i see is the kernel output.
mangodan
02-03-2006, 23:19
Got distracted by the TV, but I found the fix to be surprisingly easy, simply change th kernel boot params to say console=ttyS1 instead of console=ttyS0, this removes the kernel output and the shell ;), leaving it free for i/o with my PIC.
What baud does PMON speak at? I've played with various baud rates and cannot get any output, the first thing i see is the kernel output.
115200 baud. Strange - maybe you have a different PMON version?
sguarino
07-04-2006, 15:29
I have a uart/driver with a 1.8432MHZ xtal.
I can see the linux boot process, but I can't get the PMON boot. Neither if I press reset during power up, in this case I didn't get a byte.
The PC terminal I configure it with:
setserial /dev/ttyS0 divisor 7
setserial /dev/ttyS0 spd_cust
stty speed 38400 < /dev/ttyS0
To get the custom 16457 baud rate.
This is what I get:
CPU revision is: 00024000
Loading BCM4710 MMU routines.
Primary instruction cache 8kb, linesize 16 bytes (2 ways)
Primary data cache 4kb, linesiôe 16 bytes (2 ways)
Linux version 2.4.20 (root@localhost.localdomain) (gcc version 3.2.3 with Broadcom m4
Determined physical RAM map:
memory: 01000000 @ 00000000 (usable)
On node 0 totalpages: 4096
...
Any ideas?
todd_terry
14-04-2006, 18:34
Hi everybody!
I've made this expansion board for my WAP54G v1.1 and it works too. I use a "home made" HF generator in order to have the required frequency for the UM82450 since I can't find a 12.750MHz Xtal.
The only problem is that I can't see anything else than that:
CPU revision is: 00024000
Loading BCM4710 MMU routines.
Primary instruction cache 8kb, linesize 16 bytes (2 ways)
Primary data cache 4kb, linesize 16 bytes (2 ways)
Linux version 2.4.20 (root@pcnote) (gcc version 3.3.3) #1 Wed Sep 14 05:26:07 CEST 2005
Determined physical RAM map:
memory: 00800000 @ 00000000 (usable)
On node 0 totalpages: 2048
zone(0): 2048 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/mtdblock2 rootfstype=squashfs init=/etc/preinit noinitrd console=ttyS0,115200
CPU: BCM4710 rev 0 at 125 MHz
Calibrating delay loop... 82.94 BogoMIPS
Memory: 6280k/8192k available (1399k kernel code, 1912k reserved, 100k data, 64k init, 0k highmem)
Dentry cache hash table entries: 1024 (order: 1, 8192 bytes)
Inode cache hash table entries: 512 (order: 0, 4096 bytes)
Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 2048 (order: 1, 8192 bytes)
Checking for 'wait' instruction... unavailable.
POSIX conformance testing by UNIFIX
PCI: Disabled
PCI: Fixing up bus 0
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
devfs: v1.12c (20020818) Richard Gooch (rgooch@atnf.csiro.au)
devfs: boot_options: 0x1
JFFS2 version 2.2. (C) 2001-2003 Red Hat, Inc.
Squashfs 2.1-r2 (released 2004/12/15) (C) 2002-2004 Phillip Lougher
pty: 256 Unix98 ptys configured
Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled
ttyS00 at 0xbf800008 (irq = 2) is a 16450
PPP generic driver version 2.4.2
Physically mapped flash: Found 1 x16 devices at 0x0 in 16-bit bank
Amd/Fujitsu Extended Query Table at 0x0040
number of CFI chips: 1
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.
Flash device: 0x200000 at 0x1fc00000
Physically mapped flash: squashfs filesystem found at block 739
Creating 5 MTD partitions on "Physically mapped flash":
0x00000000-0x00040000 : "pmon"
0x00040000-0x001f0000 : "linux"
0x000b8fa0-0x0015c7a0 : "rootfs"
mtd: partition "rootfs" doesn't start on an erase block boundary -- force read-only
0x001f0000-0x00200000 : "nvram"
0x00160000-0x001f0000 : "OpenWrt"
sflash: chipcommon not found
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP, IGMP
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 512 bind 1024)
IPv4 over IPv4 tunneling driver
Linux IP multicast router 0.06 plus PIM-SM
ip_conntrack version 2.1 (5953 buckets, 5953 max) - 352 bytes per conntrack
ip_tables: (C) 2000-2002 Netfilter core team
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
NET4: Ethernet Bridge 008 for NET4.0
Bridge firewalling registered
802.1Q VLAN Support v1.7 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@redhat.com>
cryptoapi: loaded
VFS: Mounted root (squashfs filesystem) readonly.
Mounted devfs on /dev
Freeing unused kernel memory: 64k freed
I bricked my AP with a bad firmware and now it reboots itself every minute, and I can't upload anything since I don't know which IP my AP is using (it's not the default IP and I can't reset it by pressing the RESET button).
What can I do to read it's IP from the RS232 terminal?
According to OpenWRT wiki, this works on any device with the 20pin connector (http://wiki.openwrt.org/OpenWrtDocs/Customizing#head-7baf7adbb817b9339ee4e7ab9ace9b5717c211f5)
Has anyone tried this on the WL-HDD?
Has anyone tried this on the WL-HDD?
Not yet - I would like to, but I've got a question left beforehand: in the
schematic from Technik, why is CS0 on the UART connected to VCC
and CS1 to A3? I somehow expected it to be the other way round..
Floe
As a follow-up, I built a circuit based on Technik's schematic, attached it to my WL-HDD and it works :cool:
More details can be found here: OpenWRT Forum (http://forum.openwrt.org/viewtopic.php?id=7083)
Florian
maestro2912
18-04-2007, 20:32
If I understood it clearly, there is some option during kernel recompiling. User can choose where the stdout during boot process will be send, right? Can you tell me some hints how is it called? I can try it and write some notes about. It sounds more friendly than building hw UART2RS232 convertor [but it is also a option how to solve this problem].
Antiloop: pmon sources are available in wap54g sources (except ASUS modifications).
Technik: Be patient. :) The cheaper solution for the modem is the USB modem or USB/COM converter. Also, firmware by default will use first COM port for console, so you need at least another one or recompile the kernel with init string of your choice.
Hi all
We're building this thing, using the same chips (16c450) and on the same version of the wl500g. Some questions:
We read the crystal can also be one of 1.8432 mhz, we're trying it with that one. Does this also operate with the two 39uF condensators?
And the special baud rate of 16xxx should be used. Is there any Windows tool that can do that? (xp or vista)
Or do I have to use Linux?
And do we need to flash it with different firmware (OpenWRT or others) to make it work? I mean, we are gonna put OpenWRT on it eventually but we're trying to make this UART work with the standard firmware.
I was thinking maybe we should put OpenWRT on it and executing the multiplier/divider rule, on page 3 in this topic to make it easier?
Oh and the white corner on the WL500g board, with J10 next to it I believe, marks pin 1 right?
thanks in advance.
It's working now! With a 1.8432 Mhz crystal!
And because of the standaard divisor of 7 (which comes to standaard baud rates with a 13 Mhz crystal, not with our 1.8432 mhz one), we are stuck to the baud rate of 16457, just like Artie stated before.
This is not a problem thanks to Realterm (Windows app) and minicom (Linux app). Apps like Hyperterminal will not work because of the nonstandard baud rate.
We used different condensators around the crystal, 1 between 10 en 30 pF, and 1 between 40 and 60 pF. See the right datasheet for this, not Technik's drawing.
We also used different condensators around the max232, not 10mF's but 1mF's like the max232 datasheet mentioned. The circuit was a bit different there, then on Technik's drawing.
Setserial was nice for debugging (it was included in de package list of OpenWRT, except for the latest version of 7.09, we had to go back to 7.06 to get it)
It also helped setting the baud rate to a standard one, but this is useless. After a reboot this is gone. And we wanted to see it boot up over the serial cable, so we have to work with the 16457 baud rate.
Thanks Technik and Artie!